NCS23395E_新港海岸（北京）科技有限公司

欢迎您，浏览新港海岸（北京）科技有限公司官方网站！

服务热线：+86-10-53821869 / +86-755-23480857

首页

/

时钟芯片

/

PLL

/

NCS23395E

输入类型 : XTAL, Single-Ended,Differential-Ended inputs
输入端口数 : 4
输出端口数 : 12
输出类型 : LVDS, LVPECL, LVCMOS,HCSL
器件类型 : Jitter Attenuator+Clock Synthesizer
Core Supply Voltage(V) :
Output Supply Voltage(V) :
Output frequency（Min）（MHz） :
Output frequency（Max）（MHz） :
Additive Jitter(fs) :
Temperature Range :
Package :

输入类型: XTAL, Single-Ended,Differential-Ended inputs
输入端口数: 4
输出端口数: 12
输出类型: LVDS, LVPECL, LVCMOS,HCSL
器件类型: Jitter Attenuator+Clock Synthesizer

产品咨询

联系我们

NCS23395E

产品描述

NCS23395E jitter attenuators / clock multiplier combines APLL and DPLL to deliver ultra-low jitter (87fs) for high performance applications like 112G SerDes. All PLL components are fully-integrated on-chip, eliminating the risk of noise coupling associated with discrete solutions. It features 4 differential or single-ended clock inputs and 12 differential or 24 single-ended clock outputs. Each output can be configured as LVDS, LVPECL or two single-ended LVCMOS. In addition, each output clock phase can be adjusted dynamically.

NCS23395E supports free-run, synchronous and holdover modes as well as enhanced automatic or manual hitless switching between input clocks. It is programmable by I2C or SPI serial interface. NCS23395E is capable of generating any combination of output frequency from any input frequency as specified in the datasheet.